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Message from: James Hernon 22-02-2008
I must look into updating this page to a more snazzier looking page its looking old.
intel 8086 Family Architecture. . . . . . . . . . . . . . . . . . . . . 3 Instruction Clock Cycle Calculation . . . . . . . . . . . . . . . . . . 3 8088/8086 Effective Address (EA) Calculation . . . . . . . . . . . . . 3 Task State Calculation. . . . . . . . . . . . . . . . . . . . . . . . . 4 FLAGS - Intel 8086 Family Flags Register. . . . . . . . . . . . . . . . 4 MSW - Machine Status Word (286+ only) . . . . . . . . . . . . . . . . . 5 8086/80186/80286/80386/80486 Instruction Set. . . . . . . . . . . . . . 6 AAA - Ascii Adjust for Addition. . . . . . . . . . . . . . . . . . 6 AAD - Ascii Adjust for Division. . . . . . . . . . . . . . . . . . 6 AAM - Ascii Adjust for Multiplication. . . . . . . . . . . . . . . 6 AAS - Ascii Adjust for Subtraction . . . . . . . . . . . . . . . . 6 ADC - Add With Carry . . . . . . . . . . . . . . . . . . . . . . . 7 ADD - Arithmetic Addition. . . . . . . . . . . . . . . . . . . . . 7 AND - Logical And. . . . . . . . . . . . . . . . . . . . . . . . . 7 ARPL - Adjusted Requested Privilege Level of Selector (286+ PM). . 7 BOUND - Array Index Bound Check (80188+) . . . . . . . . . . . . . 8 BSF - Bit Scan Forward (386+). . . . . . . . . . . . . . . . . . . 8 BSR - Bit Scan Reverse (386+) . . . . . . . . . . . . . . . . . . 8 BSWAP - Byte Swap (486+) . . . . . . . . . . . . . . . . . . 8 BT - Bit Test (386+) . . . . . . . . . . . . . . . . . . 9 BTC - Bit Test with Compliment (386+). . . . . . . . . . . . . . . 9 BTR - Bit Test with Reset (386+) . . . . . . . . . . . . . . . . . 9 BTS - Bit Test and Set (386+) . . . . . . . . . . . . . . . . . . 9 CALL - Procedure Call. . . . . . . . . . . . . . . . . . . . . . . 10 CBW - Convert Byte to Word . . . . . . . . . . . . . . . . . . . . 10 CDQ - Convert Double to Quad (386+). . . . . . . . . . . . . . . . 10 CLC - Clear Carry. . . . . . . . . . . . . . . . . . . . . . . . . 11 CLD - Clear Direction Flag . . . . . . . . . . . . . . . . . . . . 11 CLI - Clear Interrupt Flag (disable) . . . . . . . . . . . . . . . 11 CLTS - Clear Task Switched Flag (286+ privileged). . . . . . . . . 11 CMC - Complement Carry Flag. . . . . . . . . . . . . . . . . . . . 11 CMP - Compare. . . . . . . . . . . . . . . . . . . . . . . . . . . 12 CMPS - Compare String (Byte, Word or Doubleword) . . . . . . . . . 12 CMPSXCHG - Compare and Exchange . . . . . . . . . . . . . . . . . . 12 CWD - Convert Word to Doubleword . . . . . . . . . . . . . . . . . 12 CWDE - Convert Word to Extended Doubleword (386+). . . . . . . . . 13 DAA - Decimal Adjust for Addition. . . . . . . . . . . . . . . . . 13 DAS - Decimal Adjust for Subtraction . . . . . . . . . . . . . . . 13 DEC - Decrement. . . . . . . . . . . . . . . . . . . . . . . . . . 13 DIV - Divide . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 ENTER - Make Stack Frame (80188+) . . . . . . . . . . . . . . . . 14 ESC - Escape . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 HLT - Halt CPU . . . . . . . . . . . . . . . . . . . . . . . . . . 14 IDIV - Signed Integer Division . . . . . . . . . . . . . . . . . . 14 IMUL - Signed Multiply . . . . . . . . . . . . . . . . . . . . . . 15 IN - Input Byte or Word From Port. . . . . . . . . . . . . . . . . 15 INC - Increment. . . . . . . . . . . . . . . . . . . . . . . . . . 16 INS - Input String from Port (80188+) . . . . . . . . . . . . . . 16 INT - Interrupt. . . . . . . . . . . . . . . . . . . . . . . . . . 16 INTO - Interrupt on Overflow . . . . . . . . . . . . . . . . . . . 17 INVD - Invalidate Cache (486+). . . . . . . . . . . . . . . . . . 17 INVLPG - Invalidate Translation Look-Aside Buffer Entry (486+) . . 17 IRET/IRETD - Interrupt Return. . . . . . . . . . . . . . . . . . . 17 Jxx - Jump Instructions Table. . . . . . . . . . . . . . . . . . . 18 JCXZ/JECXZ - Jump if Register (E)CX is Zero. . . . . . . . . . . . 18 JMP - Unconditional Jump . . . . . . . . . . . . . . . . . . . . . 19 LAHF - Load Register AH From Flags . . . . . . . . . . . . . . . . 19 LAR - Load Access Rights (286+ protected). . . . . . . . . . . . . 19 LDS - Load Pointer Using DS. . . . . . . . . . . . . . . . . . . . 20 LEA - Load Effective Address . . . . . . . . . . . . . . . . . . . 20 LEAVE - Restore Stack for Procedure Exit (80188+). . . . . . . . . 20 LES - Load Pointer Using ES. . . . . . . . . . . . . . . . . . . . 20 LFS - Load Pointer Using FS (386+) . . . . . . . . . . . . . . . . 21 LGDT - Load Global Descriptor Table (286+ privileged). . . . . . . 21 LIDT - Load Interrupt Descriptor Table (286+ privileged) . . . . . 21 LGS - Load Pointer Using GS (386+) . . . . . . . . . . . . . . . . 21 LLDT - Load Local Descriptor Table (286+ privileged) . . . . . . . 22 LMSW - Load Machine Status Word (286+ privileged). . . . . . . . . 22 LOCK - Lock Bus. . . . . . . . . . . . . . . . . . . . . . . . . . 22 LODS - Load String (Byte, Word or Double). . . . . . . . . . . . . 22 LOOP - Decrement CX and Loop if CX Not Zero. . . . . . . . . . . . 23 LOOPE/LOOPZ - Loop While Equal / Loop While Zero . . . . . . . . . 23 LOOPNZ/LOOPNE - Loop While Not Zero / Loop While Not Equal . . . . 23 LSL - Load Segment Limit (286+ protected). . . . . . . . . . . . . 23 LSS - Load Pointer Using SS (386+) . . . . . . . . . . . . . . . . 24 LTR - Load Task Register (286+ privileged) . . . . . . . . . . . . 24 MOV - Move Byte or Word. . . . . . . . . . . . . . . . . . . . . . 24 MOVS - Move String (Byte or Word). . . . . . . . . . . . . . . . . 25 MOVSX - Move with Sign Extend (386+) . . . . . . . . . . . . . . . 25 MOVZX - Move with Zero Extend (386+) . . . . . . . . . . . . . . . 25 MUL - Unsigned Multiply. . . . . . . . . . . . . . . . . . . . . . 25 NEG - Two's Complement Negation. . . . . . . . . . . . . . . . . . 26 NOP - No Operation (90h) . . . . . . . . . . . . . . . . . . . . . 26 NOT - One's Compliment Negation (Logical NOT). . . . . . . . . . . 26 OR - Inclusive Logical OR. . . . . . . . . . . . . . . . . . . . . 26 OUT - Output Data to Port. . . . . . . . . . . . . . . . . . . . . 27 OUTS - Output String to Port (80188+) . . . . . . . . . . . . . . 27 POP - Pop Word off Stack . . . . . . . . . . . . . . . . . . . . . 27 POPA/POPAD - Pop All Registers onto Stack (80188+). . . . . . . . 28 POPF/POPFD - Pop Flags off Stack . . . . . . . . . . . . . . . . . 28 PUSH - Push Word onto Stack. . . . . . . . . . . . . . . . . . . . 28 PUSHA/PUSHAD - Push All Registers onto Stack (80188+) . . . . . . 28 PUSHF/PUSHFD - Push Flags onto Stack . . . . . . . . . . . . . . . 29 RCL - Rotate Through Carry Left. . . . . . . . . . . . . . . . . . 29 RCR - Rotate Through Carry Right . . . . . . . . . . . . . . . . . 29 REP - Repeat String Operation. . . . . . . . . . . . . . . . . . . 30 REPE/REPZ - Repeat Equal / Repeat Zero . . . . . . . . . . . . . . 30 REPNE/REPNZ - Repeat Not Equal / Repeat Not Zero . . . . . . . . . 30 RET/RETF - Return From Procedure . . . . . . . . . . . . . . . . . 31 ROL - Rotate Left. . . . . . . . . . . . . . . . . . . . . . . . . 31 ROR - Rotate Right . . . . . . . . . . . . . . . . . . . . . . . . 31 SAHF - Store AH Register into FLAGS. . . . . . . . . . . . . . . . 32 SAL/SHL - Shift Arithmetic Left / Shift Logical Left . . . . . . . 32 SAR - Shift Arithmetic Right . . . . . . . . . . . . . . . . . . . 32 SBB - Subtract with Borrow/Carry . . . . . . . . . . . . . . . . . 33 SCAS - Scan String (Byte, Word or Doubleword) . . . . . . . . . . 33 SETAE/SETNB - Set if Above or Equal / Set if Not Below (386+). . . 33 SETB/SETNAE - Set if Below / Set if Not Above or Equal (386+). . . 33 SETBE/SETNA - Set if Below or Equal / Set if Not Above (386+). . . 34 SETE/SETZ - Set if Equal / Set if Zero (386+). . . . . . . . . . . 34 SETNE/SETNZ - Set if Not Equal / Set if Not Zero (386+). . . . . . 34 SETL/SETNGE - Set if Less / Set if Not Greater or Equal (386+) . . 34 SETGE/SETNL - Set if Greater or Equal / Set if Not Less (386+) . . 35 SETLE/SETNG - Set if Less or Equal / Set if Not greater or Equal (386+) 35 SETG/SETNLE - Set if Greater / Set if Not Less or Equal (386+) . . 35 SETS - Set if Signed (386+). . . . . . . . . . . . . . . . . . . . 35 SETNS - Set if Not Signed (386+) . . . . . . . . . . . . . . . . . 36 SETC - Set if Carry (386+) . . . . . . . . . . . . . . . . . . . . 36 SETNC - Set if Not Carry (386+). . . . . . . . . . . . . . . . . . 36 SETO - Set if Overflow (386+). . . . . . . . . . . . . . . . . . . 36 SETNO - Set if Not Overflow (386+) . . . . . . . . . . . . . . . . 36 SETP/SETPE - Set if Parity / Set if Parity Even (386+). . . . . . 37 SETNP/SETPO - Set if No Parity / Set if Parity Odd (386+). . . . . 37 SGDT - Store Global Descriptor Table (286+ privileged) . . . . . . 37 SIDT - Store Interrupt Descriptor Table (286+ privileged). . . . . 37 SHL - Shift Logical Left . . . . . . . . . . . . . . . . . . . . . 37 SHR - Shift Logical Right. . . . . . . . . . . . . . . . . . . . . 38 SHLD/SHRD - Double Precision Shift (386+). . . . . . . . . . . . . 38 SLDT - Store Local Descriptor Table (286+ privileged). . . . . . . 38 SMSW - Store Machine Status Word (286+ privileged) . . . . . . . . 38 STC - Set Carry. . . . . . . . . . . . . . . . . . . . . . . . . . 39 STD - Set Direction Flag . . . . . . . . . . . . . . . . . . . . . 39 STI - Set Interrupt Flag (Enable Interrupts). . . . . . . . . . . 39 STOS - Store String (Byte, Word or Doubleword). . . . . . . . . . 39 STR - Store Task Register (286+ privileged). . . . . . . . . . . . 39 SUB - Subtract . . . . . . . . . . . . . . . . . . . . . . . . . . 40 TEST - Test For Bit Pattern. . . . . . . . . . . . . . . . . . . . 40 VERR - Verify Read (286+ protected). . . . . . . . . . . . . . . . 40 VERW - Verify Write (286+ protected) . . . . . . . . . . . . . . . 40 WAIT/FWAIT - Event Wait. . . . . . . . . . . . . . . . . . . . . . 41 WBINVD - Write-Back and Invalidate Cache (486+). . . . . . . . . . 41 XCHG - Exchange. . . . . . . . . . . . . . . . . . . . . . . . . . 41 XLAT/XLATB - Translate . . . . . . . . . . . . . . . . . . . . . . 41 XOR - Exclusive OR . . . . . . . . . . . . . . . . . . . . . . . . 42 Intel 8086 Family Architecture General Purpose Registers Segment Registers AH/AL AX (EAX) Accumulator CS Code Segment BH/BL BX (EBX) Base DS Data Segment CH/CL CX (ECX) Counter SS Stack Segment DH/DL DX (EDX) Data ES Extra Segment (FS) 386 and newer (Exx) indicates 386+ 32 bit register (GS) 386 and newer Pointer Registers Stack Registers SI (ESI) Source Index SP (ESP) Stack Pointer DI (EDI) Destination Index BP (EBP) Base Pointer IP Instruction Pointer Status Registers FLAGS Status Flags (see FLAGS) Special Registers (386+ only) CR0 Control Register 0 DR0 Debug Register 0 CR2 Control Register 2 DR1 Debug Register 1 CR3 Control Register 3 DR2 Debug Register 2 DR3 Debug Register 3 TR4 Test Register 4 DR6 Debug Register 6 TR5 Test Register 5 DR7 Debug Register 7 TR6 Test Register 6 TR7 Test Register 7 Register Default Segment Valid Overrides BP SS DS, ES, CS SI or DI DS ES, SS, CS DI strings ES None SI strings DS ES, SS, CS - see CPU DETECTING Instruction Timing Instruction Clock Cycle Calculation Some instructions require additional clock cycles due to a "Next Instruction Component" identified by a "+m" in the instruction clock cycle listings. This is due to the prefetch queue being purge on a control transfers. Below is the general rule for calculating "m": 88/86 not applicable 286 "m" is the number of bytes in the next instruction 386 "m" is the number of components in the next instruction (the instruction coding (each byte), plus the data and the displacement are all considered components) 8088/8086 Effective Address (EA) Calculation Description Clock Cycles Displacement 6 Base or Index (BX,BP,SI,DI) 5 Displacement+(Base or Index) 9 Base+Index (BP+DI,BX+SI) 7 Base+Index (BP+SI,BX+DI) 8 Base+Index+Displacement (BP+DI,BX+SI) 11 Base+Index+Displacement (BP+SI+disp,BX+DI+disp) 12 - add 4 cycles for word operands at odd addresses - add 2 cycles for segment override - 80188/80186 timings differ from those of the 8088/8086/80286 Task State Calculation "TS" is defined as switching from VM/486 or 80286 TSS to one of the following: ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ New Task ³ ÃÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄ´ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´486 TSS³486 TSS³386 TSS³386 TSS³286 TSS³ ³ Old Task ³ (VM=0)³ (VM=1)³ (VM=0)³ (VM=1)³ ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ´ 386 TSS (VM=0) ³ ³ ³ 309 ³ 226 ³ 282 ³ ÃÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ´ 386 TSS (VM=1) ³ ³ ³ 314 ³ 231 ³ 287 ³ ÃÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ´ 386 CPU/286 TSS ³ ³ ³ 307 ³ 224 ³ 280 ³ ÃÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ´ 486 CPU/286 TSS ³ 199 ³ 177 ³ ³ ³ 180 ³ ÀÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÙ Miscellaneous - all timings are for best case and do not take into account wait states, instruction alignment, the state of the prefetch queue, DMA refresh cycles, cache hits/misses or exception processing. - to convert clocks to nanoseconds divide one microsecond by the processor speed in MegaHertz: (1000MHz/(n MHz)) = X nanoseconds - see 8086 Architecture FLAGS - Intel 8086 Family Flags Register ³11³10³F³E³D³C³B³A³9³8³7³6³5³4³3³2³1³0³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ CF Carry Flag ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ 1 ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ PF Parity Flag ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ 0 ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ AF Auxiliary Flag ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ 0 ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ ZF Zero Flag ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ SF Sign Flag ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ TF Trap Flag (Single Step) ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ IF Interrupt Flag ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ DF Direction Flag ³ ³ ³ ³ ³ ³ ÀÄÄÄ OF Overflow flag ³ ³ ³ ³ ÀÄÁÄÄÄ IOPL I/O Privilege Level (286+ only) ³ ³ ³ ÀÄÄÄÄÄ NT Nested Task Flag (286+ only) ³ ³ ÀÄÄÄÄÄ 0 ³ ÀÄÄÄÄÄ RF Resume Flag (386+ only) ÀÄÄÄÄÄÄ VM Virtual Mode Flag (386+ only) - see PUSHF POPF STI CLI STD CLD MSW - Machine Status Word (286+ only) ³31³30-5³4³3³2³1³0³ Machine Status Word ³ ³ ³ ³ ³ ³ ÀÄÄÄÄ Protection Enable (PE) ³ ³ ³ ³ ³ ÀÄÄÄÄÄ Math Present (MP) ³ ³ ³ ³ ÀÄÄÄÄÄÄ Emulation (EM) ³ ³ ³ ÀÄÄÄÄÄÄÄ Task Switched (TS) ³ ³ ÀÄÄÄÄÄÄÄÄ Extension Type (ET) ³ ÀÄÄÄÄÄÄÄÄÄÄ Reserved ÀÄÄÄÄÄÄÄÄÄÄÄÄÄ Paging (PG) Bit 0 PE Protection Enable, switches processor between protected and real mode Bit 1 MP Math Present, controls function of the WAIT instruction Bit 2 EM Emulation, indicates whether coprocessor functions are to be emulated Bit 3 TS Task Switched, set and interrogated by coprocessor on task switches and when interpretting coprocessor instructions Bit 4 ET Extension Type, indicates type of coprocessor in system Bits 5-30 Reserved bit 31 PG Paging, indicates whether the processor uses page tables to translate linear addresses to physical addresses - see SMSW LMSW